LEON-PF

Introduction

The LEON5 processor and the GRLIB IP library has support for Microchip PolarFire FPGAs. This support consists of a techmap layer that wraps specific technology elements such as memory macros and pads. GRLIB also contains a template designs for developments boards such as the PolarFire FPGA Splash Kit and infrastructure that automatically builds project files for Libero SoC and synthesis tools such as Mentor Precision Hi-Rel and Synopsys Synplify Premier. More information about GRLIB and Cobham Gaisler IP cores is available on the SoC library page.

LEON-PF board

Example designs

Cobham Gaisler provides prebuilt bitstreams of the PolarFire FPGA Splash Kit LEON5 template design. These bitstreams are intended for evaluation of software running on a LEON5 SoC. To evaluate these designs, the following items are required:

  • PolarFire FPGA Splash Kit (currently bitstreams are only available for the MPF300_ES device) 
  • Workstation with GNU/Linux or Microsoft Windows
  • Microchip software to program FPGA
  • Bitstream, available further down on this page
  • GRMON3 debug monitor - GRMON3 evaluation version (version 3.2.9 or later required)

The example design range is called LEON-PF-EX: