The LEON3 processor and the GRLIB IP library have support for Lattice/Frontgrade Certus/Pro-NX-RT FPGAs. This support consists of a techmap layer that wraps specific technology elements such as memory macros and pads. GRLIB also contains template designs for development boards and a scripts infrastructure that automatically builds project files for Lattice Radiant and synthesis tools such as Synopsys Synplify. More information about GRLIB and our IP cores is available on the SoC library webpage.

We provide pre-built bitstreams of the LEON3 template design for the CertusPro-NX Versa Board and for the Certus-NX Versa Evaluation Board.

These bitstreams are intended for the evaluation of software running on a LEON3 SoC.

The bitstreams are just examples: the underlying SoC architecture can be extended and modified.

To evaluate these designs, the following items are required:

- Certus-NX Versa Evaluation Board or CertusPro-NX Versa Board

- Workstation with GNU/Linux or Microsoft Windows

- Lattice Radiant software to program the FPGA

- Bitstream, available further down on this page

- GRMON3 debug monitor (evaluation version), to connect to the LEON3 SoC and execute software

LEON-CERTUS - Board: Certus-NX Versa Evaluation Board - LEON-CERTUS Quick Start guide - LEON-CERTUS FPGA configuration files
LEON-CERTUSPRO - Board: CertusPro-NX Versa Board - LEON-CERTUSPRO Quick Start guide - LEON-CERTUSPRO FPGA configuration files

Introduction

The LEON5 processor and the GRLIB IP library has support for Xilinx Kintex Ultrascale devices. This support consists of a techmap layer that wraps specific technology elements such as memory macros and pads. GRLIB also contains a template designs for developments boards such as the Xilinx Kintex UltraScale FPGA KCU105 Evaluation Kit and infrastructure that automatically builds project files for Xilinx Vivado and synthesis tools such as Mentor Precision Hi-Rel and Synopsys Synplify Premier. More information about GRLIB and our IP cores is available on the SoC library page.