Cobham Gaisler AB provides IP cores and supporting development tools for embedded processors based on the SPARC architecture. We specialize in digital hardware design for both commercial and aerospace applications
Cobham Gaisler / Pender Electronic Design
| Product ID | Description | Device |
| GR-CPCI-GR740 | Quad-Core LEON4-FT Development Board | GR740 |
| GR712RC-BOARD | Cobham Gaisler Dual-core LEON3FT Development board | GR712RC |
| GR718B-BOARD | Cobham Gaisler Dual-core LEON3FT Development board | GR718B |
| GR-CPCI-UT699 | Cobham UT699 Compact-PCI board | Cobham UT699 |
| GR-CPCI-LEON4-N2X | Quad-Core LEON4 Next Generation Microprocessor Evaluation Board | LEON4-N2X |
| GR-CPCI-XC7K | Virtex-Xilinx Kintex-7 FPGA development board | XC7K32ST |
| GR-XC6S-LX75 | Low-cost Spartan6 FPGA Development board | Xilinx XC6SLX75 |
| GR-PCI-XC5V |
Xilinx Virtex 5, PCI FPGA Development board | XC5VLX50 |
| GR-CPCI-XC4V | Virtex-IV Compact-PCI FPGA Development board | XC4VLX100 |
| GR-CPCI-AX |
Actel AX2000 Compact-PCI FPGA Development board | Actel AX2000 |
| GR-MCC-C | Actel ProASIC3 FPGA Development board | Actel A3PE3000E |
Overview brochure for LEON3 development boards. To order, go to the board ordering page.
There are several mezzanine boards especially developed for the above development boards.
There are several accessory boards developed for the above development boards.
The application note on mezzanine connectors describes the pin numbering used for the AMP connectors.
GR-XCKU Development Board
Features
- Xilinx XCKU060, in 1156 pin BGA package
- Memory
- SDRAM, 40 bit wide,(3 x ISSI IS42VM16320E, 512M, 1.8V, 133MHz 32Mx16)
- SRAM, 40 bit wide (3 x Cypress CY62187EV30, 4Mx16)
- Parallel Boot flash, 40 bit wide (3 x Micron SST38VF6401, 64Mx16)
- Power, Reset, Clock and Auxiliary circuits
- Three FMC Mezzanine expansion connectors
- Interface circuits required for the interface features listed below
The interface connectors on the Front edge of the board provide:
- 4 port SPW interface (4 x MDM9S)
- Two CAN bus interfaces
- Three UART style RS232 interfaces
The interface connectors on the Back edge of the board provide:
- Input power connector: +12V nom.
- Reset and FPGA Configuration push-buttons
- SMB connector for External clock input
- LED indicator for +12V power
Additionally, on-board headers and components provide access to the following functio
ns/ features:
- DIP switches for general purpose use (8x)
- LED indicators for on-board voltages
- LED indicators for general purpose use (8x)
- SPI and I2C interface user connections on 0.1” header
- Header for General Purpose I/O signals (16x)
- Header for PWM Output signals (12x)
- Header for PM Bus monitoring and programmingGR-XCKU
- JTAG FPGA programming interface
- Push Button switch for RESET and FPGA-CONFIG
| Document | File |
| GR-XCKU User' Manual | GR-XCKU_user_manual_CG_rev1-2_20171128.pdf (November 2017) |