Cobham Gaisler AB provides IP cores and supporting development tools for embedded processors based on the SPARC architecture. We specialize in digital hardware design for both commercial and aerospace applications


Cobham Gaisler provides the LEON processor, a 32-bit synthesisable processor core based on the SPARC V8 architecture. The core is highly configurable, and particularly suitable for system-on-a-chip (SOC) designs. Several versions of the LEON processor have been developed.

The LEON2 processor was designed under contract from the European Space Agency, and is now available as a radiation-hardened components from Microchip (AT697 and AT7913).

The LEON3 core is a re-implementation of the SPARC V8 architecture, with a deeper 7-stage pipeline and multi-processor support. It is distributed as part of the GRLIB IP library. A fault-tolerant verion of LEON3 is also available, suitable for implementation on both ASIC technologies and radiation-tolerant FPGAs from Actel and Xilinx.

The new LEON4 core is an evolution from the LEON3 core with improved performance thanks to wider internal buses, modified pipeline and support for a Level-2 cache.

Processor IP cores

LEON3FT IHP 0.20 um

LEON3FT based products

LEON4FT based products

SPARC documentation