GR765 Octa-Core LEON5 SPARC V8 Processor

Introduction

The GR765 system-on-chip is a concept with an octa-core fault-tolerant LEON5 SPARC V8 processor, 12-port SpaceWire router, 10/100/1000 Mbit Ethernet interfaces, high-speed serial links, PCI initiator/target interface, and CAN-FD interfaces.
Please note that this is a running development and no guarantees can be given concerning future product availbility. All information on this page is subject to change without notice.
 
GR765 block diagram
 

Specification

  • Processor frequency: > 300 MHz
  • Main memory interface: DDR2/3 SDRAM

Features

  • Octa-core LEON5FT with per core dedicated FPU and MMU
  • 32 KiB per core L1 cache, connected to 128-bit bus
  • TBD MiB L2 cache, 256-bit cache line, 4-ways
  • DDR2/3 interface with dual x8 device correction capability
  • DMA controllers
  • 12-port SpaceWire router with +4 internal ports
  • 32-bit 33 MHz PCI interface
  • 2x 10/100/1000 Mbit Ethernet
  • TT / TSN Ethernet support (TBD)
  • Debug links: Ethernet, JTAG, SpaceWire
  • 2x MIL-STD-1553B, 2x CAN-FD, 12 x UART
  • 2x SPI master/slave, GPIO, Timers & Watchdog
  • 2x I2C interface
  • NAND Flash controller interface
  • FPGA Supervisor interface
  • SpaceFibre x4+ lanes 6.25 Gbit/s, simpler protocols
  • High-pin count – LGA1752 (TBD)
  • Reduction of pin sharing
Applications
The GR765 is targeted at high-performance general purpose processing with support for mixed-criticality applications. The architecture is suitable for both symmetric and asymmetric multiprocessing and contains design extensions to provide hardware support for isolation between mixed-criticality applications.

Software Support

The GR765 is immediately supported by development tools such as the GRMON software debugger and various compilers and operating systems and a qualified boot loader for flight.

Schedule

The full GR765 development from concept to flight model availability has the following engineering activities:

  • Phase 1 - Prototype development. Output: GR765ES component
    • GR765ES design
    • GR765ES manufacturing
    • GR765ES electrical test
    • GR765ES radiation validation
    • GR765ES ESD tests
    • GR765-XX design – extensions of SoC design to create design suitable for FM
  • Phase 2 - FM development. Output: GR765-XX – GR765 prototypes without an established production test program
    • GR765-XX manufacturing
    • GR765-XX ceramic package development
    • GR765-XX electrical test
    • GR765-XX ESD tests
    • GR765-XX radiation validation
  • Phase 3 - GR765 flight model qualification. Output: GR765 prototypes, triple-temp test prototypes and GR765 flight models
    • GR765-CP/MP/MS manufacturing (same design as GR765-XX)
    • GR765-CP/MP/MS electrical test
    • GR765-MS lot validation

Currently the phase 1 development is ongoing with GR765ES availablity, on development boards, in 2022.

Development Board

A development board with GR765 engineering samples (GR765ES) is scheduled to be available in 2022.

Documentation

No public documentation is available at this stage. 

Document File
GR765 Data Sheet and User’s Manual An advanced data sheet / user's manual is scheduled for release in June 2021.