Cobham Gaisler is a world leader in embedded computer systems for harsh environments, with footprints in many parts of the solar system. We provide the full ecosystem to support digital hardware design for mission critical System-on-a-Chip solutions. The IP cores and development tools support processors based on the SPARC and RISC-V architectures. In addition to this, a number of standard components are available.
RISC-V synthesizable processor model - NOEL-V
The NOEL-V is a synthesizable VHDL model of a processor that implements the open RISC-V architecture.
This is the first released model in Cobham Gaisler's RISC-V product line of processors. Seven different configurations are now available for NOEL-V, ranging from a tiny 32-bit version to a 64-bit high performance version. NOEL-V complements the LEON line of processors.
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Rad-Hard Dual-Core System-on-Chip
Dual-Core LEON3-FTGR712RC Radiation-hard Dual-Core LEON3-FT Processor, 200 MIPS, 200 MFLOPS |
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Rad-Hard Quad-Core System-on-Chip
Quad-Core LEON4-FTGR740 Radiation-hard Quad-Core LEON4-FT Processor, 1000 MIPS, 1000 MFLOPS |
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 GR740 CG625 |
Latest Releases
| NOEL-V processor model LEON5 processor model GRLIB IP Library 2020.4-b4261 GR712RC user's manual 2.13 GR712RC data sheet 2.4 GR740 user's manual 2.4 GR716 data sheet 1.34 GR718B user's manual 3.7 |
GRMON3 Debug Monitor 3.2.11 GRMON2 Debug Monitor 2.0.99 TSIM3 LEON Simulator 3.0.2 TSIM2 LEON/ERC32 Simulator 2.0.66 BCC Bare-C Compiler 2.2.0 RCC RTEMS Compiler 1.2.25, 1.3.0 VxWorks 7 support for LEON VxWorks 6.9 support for LEON |
LEON and NOEL FPGA Evaluation Designs
| LEON/GRLIB Examples for Microchip RTG4 LEON5/GRLIB Examples for Microchip PolarFire LEON5/GRLIB Examples for Xilinx Kintex Ultrascale NOEL-V/GRLIB Examples for Microchip PolarFire NOEL-V/GRLIB Examples for Xilinx Kintex Ultrascale NOEL-V/GRLIB Examples for Digilent Arty-A7 |
Daiteq Selected as the First ESA NOEL-V User
Cobham Gaisler proudly announced from the RISC-V Summit that its new NOEL-V processor model is in use by daiteq’s European Space Agency (ESA) research activity, “Evaluation and Instruction Set Extension of a RISC-V Soft Core for Space.”
Read the full Press Release
Cobham Gaisler Introduces Support for Wind River VxWorks RTOS for NOEL-V Processor
Cobham Gaisler announced at the RISC-V Summit the availability of Wind River’s real-time operating system VxWorks for the NOEL-V processor IP core.
For more than 15 years, the partnership has provided customers with VxWorks for the fault tolerant LEON3FT and LEON4FT processor families and other space-grade microprocessors. Wind River recently introduced RISC-V support in Simics and VxWorks, for which the NOEL-V BSP has been developed. Now, Wind River and Cobham Gaisler can strengthen the partnership to include RISC-V and NOEL-V.
Read the full Press Release.
Cobham Gaisler and fentISS Deepen Collaboration around RISC-V
Cobham Gaisler announced at the RISC-V Summit that fent Innovative Software Solutions (fentISS), a developer of software solutions specifically designed for critical real-time embedded partitioned systems, has agreed to mutually promote flagship products NOEL-V and LEON5 processors and the XtratuM Next Generation (XNG) hypervisor.
Read the full press release.
Cobham Gaisler Offers RISC-V Support for Microchip Technology’s PolarFire® FPGA Devices
Cobham Gaisler announced at the RISC-V Summit that two of its new processor models are now available for Microchip’s PolarFire FPGA devices. The LEON5 SPARC V8 32-bit processor is a continuation of the successful LEON line of processor models primarily used within space applications. The NOEL-V is now also released in a 32-bit version as part of the processor product line that implements the open instruction set architecture from RISC-V International.
Read the full press release.
Porting PikeOS to NOEL-V and LEON: SYSGO and Cobham Gaisler Extend Cooperation around RISC-V
RISC-V international members SYSGO and Cobham Gaisler, the design center of Cobham Advanced Electronic Solutions (CAES), have announced their collaboration to deliver SYSGO's hypervisor-based real-time operating system, PikeOS, ported onto Cobham Gaisler's IP cores NOEL-V and LEON.
Read the full press release.
Join us at the virtual RISC-V Summit in December
Cobham Gaisler will be presenting the latest updated on the NOEL-V processor implementing the RISC-V Instruction Set Architecture (ISA) at the RISC-V Summit on December 8-10, 2020. Use the discount code in the picture above to register and meet us in our virtual booth, enjoy our Tech Talk on The Case for RISC-V in Space Applications, listen to our presentation on NOEL-V: A new high-performance RISC-V processor family and also listen to Jaume Abella's (Barcelona Supercomputing Center) presentation on Tackling Safety in Space with RISC-V Based Platforms.
Cobham Gaisler to fly GR740 and GR716 on ESA's GOMX-5 mission
GomSpace A/S and the European Space Agency (ESA) have signed a contract to continue the development of the GOMX-5 mission, focused on demonstrating new nanosatellite capabilities in space, particularly for next generation constellations in Low Earth Orbit. GOMX-5 mission will consist of a 12U nanosatellite in the 20kg class to be launched in Q2 2022. The satellite will host several advanced payloads, including the powerful radiation-tolerant Advanced Payload Processors (APPs) including a GNSS Software receiver. The APPs payload will be jointly developed by Cobham Gaisler, GMV, LIRMM and UFSC. Cobham Gaisler will fly its GR740 quad-core LEON4FT processor in a organic package and the GR716A deterministic single-core EON3FT microprocessor.
Read the full press release from GomSpace.
ESA Contract awarded for Development of New LEON3FT Microcontroller for Space Applications
Cobham Gaisler announced today that it has received a contract from the European Space Agency (ESA) for the development and validation of a new mixed-signal LEON3FT microcontroller. This development helps meet market demands for high reliability, radiation-hardened microcontrollers based on the existing LEON processor technology. The GR716B LEON3FT Microcontroller is based on its previous joint ESA collaboration Microcontroller for Embedded Applications resulting in the GR716 series of microcontrollers for radiation-hardened mixed signal processing applications.
Read the full press release.
Cobham's RadHard Microelectronics Assist in Study of Sun and Earth Connection
Cobham Advanced Electronic Solutions (CAES), and its subsidiary Cobham Gaisler, a leading provider of advanced electronics for mission critical applications, announced today that an abundance of its radiation hardened (RadHard) and high reliability solutions are assisting in the European Space Agency’s (ESA) Solar Orbiter Mission.
Read the full press release.
Cobham Gaisler joins Swedish Aerospace Industries
Cobham Gaisler AB, the Swedish subsidiary of Cobham Advanced Electronic Solutions (CAES), has recently been accepted as a member of the Swedish Aerospace Industries association. The Swedish Aerospace Industries is a non-profit association and industry organization whose purpose is to safeguard the interests of its members by representing the Swedish civil aviation and space industry on common issues where a national and industry representative association is needed, or where a joint or coordinated activity is deemed otherwise suitable.
Read the full press release.
Rymdforum 2021 to be hosted by Cobham Gaisler, Chalmers Technical University and the City of Gothenburg
The Rymdforum 2021 conference (the Swedish biennial space forum) will present news, explore trends, and open for dialogue and discussions related to space activities. The conference will take place in Gothenburg, 21-23 March 2021. Cobham Gaisler, together with the Chalmers Technical University and the City of Gothenburg, will be arranging the conference. Follow the progress of the conference on social media and on the conference web site.
@rymdforum2021 #rymdforum2021 #rymd2021
Visit the conference web site.
Cobham Advanced Electronic Solutions Radiation Hardened Microelectronics Support New Xilinx XQRKU060 FPGA
We have announced today that a variety of our radiation hardened (RadHard) solutions and Intellectual Property (IP) cores for space applications, provide support for the new Xilinx Radiation Tolerant (RT) Kintex UltraScale XQRKU060 Field-Programmable Gate Array (FPGA). Cobham Gaisler provides IP cores to be used with the XQRKU060.
The GRSRCUB FPGA scrubber and supervisor IP core supports programming the XQRKU060 and several periodic scrubbing modes to prevent accumulation of errors in the FPGA configuration memory.
Cobham Gaisler's GRLIB IP library that contains over 100 peripheral IP cores together with the NOEL-V RISC-V processor and the LEON3FT and LEON5FT SPARC processors have been adapted to support system-on-a-chip designs targeting the XQRKU060.
Read the full press release.
SELENE: Self-monitored Dependable platform for High-Performance Safety-Critical Systems
High-performance computing that employs commercial off-the-shelf components offers an alternative path to increasing the computational capability of safety-critical applications. Despite their potential in a number of domains, use of these systems is limited due to the lack of certified, reliable hardware platforms. The EU funded SELENE project aims to change this by proposing a safety-critical cognitive computing platform with self-aware and self-adaptive capabilities. Cobham Gaisler's NOEL-V processor implementing the RISC-V instruction set architecture is used in the project.
Read more on the project page.
Cobham Advanced Electronic Solutions’ GR712RC Processor Runs CHEOPS’ Instrument Flight Software
The first ESA S-class mission CHEOPS, which stands for CHaracterising ExOPlanet Satellite, recently lifted off on a Soyuz rocket from Europe's spaceport in Kourou. The satellite contains one payload, a 32 cm diameter on-axis telescope. The Data Processing Unit (DPU) within the Back-End Electronics (BEE) of the telescope was built by the Space Research Institute (Institut für Weltraumforschung, IWF) of the Austrian Academy of Sciences in Graz, Austria. The DPU is based on the Radiation-Hardened GR712RC LEON3FT Dual-Core Microprocessor.
Read the full press release.
See the LEON5 and NOEL-V video clip
The Gothenburg Symphony Orchestra has produced our video clip promoting the new LEON5 and NOEL-V processor IP cores that will be released on 25 December for download into Xilinx’ Kintex UltraSCALE FPGAs. The original music score has been composed by Hans Ek who has also conducted the Gothenburg Symphony Orchestra when it was performed as part of Kosmische Musik at the Gothenburg Concert Hall on 27 October 2018,
Cobham Releases RISC-V Processor IP Core
Cobham Gaisler has announced at the RISC-V Summit in San Jose, California, that it will release a new line of processor Intellectual Property (IP) cores that implements the RISC-V instruction set architecture (ISA). The NOEL-V processor IP core, the first product in the family, will be made available on 25 December for download into Xilinx’ Kintex UltraSCALE FPGAs.
Read the full press release.
Cobham Releases LEON5 Processor IP Core
Cobham Gaisler has announced at the 12th Annual Workshop on Spacecraft Flight Software, at NASA Marshall Space Flight Center, that it will release a new processor Intellectual Property (IP) core based on the SPARC instruction set architecture (ISA). The new LEON5 processor IP core, which succeeds the previous LEON4 processor, will be made available on 25 December for download into Xilinx’ Kintex UltraSCALE FPGAs.
Read the full press release.
Vacancy Notice
We're looking for a Radiation Engineer, a Component Engineer, an ASIC/FPGA Engineer and a Senior Electronics Design Engineer to join our team ...read more
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