Cobham Gaisler AB provides IP cores and supporting development tools for embedded processors based on the SPARC architecture. We specialize in digital hardware design for both commercial and aerospace applications
Rad-Hard Dual-Core System-on-Chip
Dual-Core LEON3-FTGR712RC Radiation-hard Dual-Core LEON3-FT Processor, 200 MIPS, 200 MFLOPS |
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Rad-Hard Quad-Core System-on-Chip
Quad-Core LEON4-FTGR740 Radiation-hard Quad-Core LEON4-FT Processor, 1000 MIPS, 1000 MFLOPS |
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 GR740 CG625 |
Latest Releases
| LEON/GRLIB bitstreams for RTG4 GRLIB IP Library 2019.2-b4241 GR712RC user's manual 2.12 GR712RC data sheet 2.4 GR712RC-BOARD document 0.13 GR740 user's manual 2.3 GR716 data sheet 1.29 GR718B user's manual 3.3 LEON3FT-RTAX document 1.9 RT-SPW-ROUTER document 1.2 |
GRMON3 Debug Monitor 3.1.1 GRMON2 Debug Monitor 2.0.98 TSIM2 LEON/ERC32 Simulator 2.0.64 GRSIM LEON MP Simulator 1.1.56 BCC Bare-C Compiler 2.0.7 RCC RTEMS Compiler 1.2.23 VxWorks 7 support for LEON VxWorks 6.9 support for LEON |
DDC's New 3U SBC Incorporates Cobham Processor Technology
Data Device Corporation (DDC) and Cobham Gaisler jointly announced at the RADECS (RADiation Effects on Components and Systems) Conference that the radiation-hardened GR740 Quad-Core LEON4FT (Fault-Tolerant) Processor device will be used in DDC’s latest Rad-Hard Single Board Computer (SBC), the SCS3740. Read the full press release.
Cobham Gaisler will participate in Rymdveckan, or "Space Week" that will be held in Gothenburg, Sweden, between 14th and 22nd of September. Read the full details of our engagement.
Cobham Processor Technology Powers Commercial NanoSatellite
Cobham Gaisler’s LEON3FT processor technology is used on the VESTA-1 nanosatellite developed and operated by Surrey Satellite Technology Ltd (SSTL). SSTL has recently confirmed the successful commissioning and operation of VESTA-1, a 3U nanosatellite technology demonstration mission that will test a new two-way VHF Data Exchange System (VDES) payload developed by Honeywell for the ExactEARTH advanced maritime satellite constellation. Read the full press release.
Cobham Joins RISC-V Foundation
Cobham Gaisler has announced that is has recently been accepted as a Gold-Level Member of the RISC-V Foundation and intends to release products based on the RISC-V ISA in parallel with the further development of its LEON SPARC processor based products. The initial RISC-V product will be a RV64GC compliant processor Intellectual Property (IP) core written in VHDL. Read the full press release.
GRMON 3.0 release now available
Cobham Gaisler released in March 2018 the new GRMON3 debug monitor. In addition to the features found in previous GRMON versions a new graphical user interface greatly extends the traditional monitoring and control capabilities. Please see the GRMON3 product page for more information.
Vacancy Notice
We're looking for a Software developer to join our team ...read more
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