We are a world leader in embedded computer systems for harsh environments, with footprints in many parts of the solar system.
We provide the full ecosystem to support digital hardware design for mission critical System-on-a-Chip solutions. The IP cores and development tools support processors based on the SPARC and RISC-V architectures. In addition to this, a number of standard components are available.
The second edition of the GR740 User Day was collocated with the RISC-V In Space Workshop. Access the event.
Ready to be challenged? We are hiring!
Are you curious about starting a new engaging role, at a world-leading company that works towards European Space Agency and NASA? Then this is your opportunity. We are continuously looking for experienced hardware and software engineers. We welcome your application!
Access our career page or contact us through career (at) gaisler.com.
SPARC or RISC-V? LEON or NOEL-V?
Ever wonder which microprocessor to use in your space system design?
Check out this white paper which discusses the differences between LEON/SPARC and NOEL-V/RISC-V architectures. The paper describes our past and ongoing component development and explains the rationale for some architectural design choices for future roadmap products. Included herein are trends in the Space industry that are driving key new features example application use-cases and tradeoffs from a software perspective of a legacy LEON/SPARC design vs. a new RISC-V architecture.
Access the white paper
RISC-V Processor Model - NOEL-V
The NOEL-V is a synthesizable VHDL model of a processor that implements the open RISC-V architecture from the RISC-V International organization.
This is the first released model in the RISC-V product line of processors. Seven different configurations are now available for NOEL-V, ranging from a tiny 32-bit version to a 64-bit high performance version. NOEL-V complements the LEON line of processors. Click here for more information.
Rad-Hard Dual-Core Processor
Dual-Core LEON3-FTGR712RC Radiation-hard Dual-Core LEON3-FT Processor, 200 MIPS, 200 MFLOPS |
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Rad-Hard Quad-Core System-on-Chip
Quad-Core LEON4-FTGR740 Radiation-hard Quad-Core LEON4-FT Processor, 1000 MIPS, 1000 MFLOPS, QML-V/QML-Q |
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 GR740 CG625 |
The GR740 component has received QML-V and QML-Q quality certification by DLA in Q2 2022. Access the GR740 SMD 5962-21204.
Rad-Hard Quad-Core System-on-Chip - Plastic
Quad-Core LEON4-FTGR740-PBGA Plastic Radiation-hard Quad-Core LEON4-FT Processor, 1000 MIPS, 1000 MFLOPS |
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Latest Releases
| NOEL-V processor model LEON5 processor model GRLIB IP Library 2023.2-b4283 GR712RC user's manual 2.16 GR712RC data sheet 2.5 GR740 user's manual 2.6 GR716A data sheet 3.2 GR718B user's manual 3.8 |
GRMON3 Debug Monitor 3.3.6 GRMON2 Debug Monitor 2.0.99 TSIM3 LEON Simulator 3.1.10 TSIM2 LEON/ERC32 Simulator 2.0.66 BCC Bare-C Compiler 2.2.4 RCC RTEMS Compiler 1.2.25, 1.3.1 VxWorks 7 support for LEON VxWorks 6.9 support for LEON |
LEON and NOEL FPGA Evaluation Designs
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LEON/GRLIB examples for Lattice Certus/Pro-NX-RT |
IP SoC Conference, November 2023
We are exhibiting at the IP SoC Conference, an event organized by Design & Reuse fully dedicated to Silicon Intellectual Property (IP) and IP-based electronic systems. Come and meet us and don't miss our presentation "GRLIB: VHDL IP library for fault-tolerant SoC", from our colleague Fabio Malatesta.
Access the event.
NanoXplore Brave Days, November 2023
Sandi Habinc, our General Manager, delivered a presentation at the Brave Days 2023, conference organized by NanoXplore at the ESA Space Research and Technology Centre (ESTEC). He officially announced that our GR765 quad-core processor will incorporate a 30k LUT embedded FPGA from NanoXplore. The GR765 will be implemented on the same 28nm FDSOI process from STMicroelectronics as the NG-ULTRA and ULTRA300 FPGA devices.
Access the event.
Microelectronics Workshop (MEWS), October 2023
Christian Sayer, our Field Application Engineer, will give a presentation at MEWS (Microelectronics Workshop), organized by JAXA (Japan Aerospace Exploration Agency). Christian will explore the GR765, a high-performance space-grade system-on-chip we are developing, which will implement both the SPARC and the RISC-V architectures. The GR765 is a perfect match for the keywords of the conference: "Next-Generation digital devices".
Access the event.
European Data Handling & Data Processing Conference, October 2023
We are exhibiting at EDHPC 2023, the first European Space Power Conference. Meet us at booth 25 and don't miss our presentations about the GR765 octa-core SoC, the GR716 microcontroller, and the GRLIB VHDL IP library.
Access the event.
European Space Power Conference, October 2023
We are exhibiting at ESPC 2023, the European Space Power Conference. If you are attending, join us at booth 30 and learn about the GR716, our rad-hard mixed-signal MCU for real-time distributed control and telemetry.
Access the event.
How to design a RISC-V space microprocessor
In the world of advanced technology and exploration, some missions take us where ordinary microprocessors cannot dare to go. Read our last blog: we will uncover some techniques behind the creation of the space microprocessors. The blog is published by RISC-V International.
Read the blog here.
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