The I²C slave to AHB bridge core is a I²C slave that provides a link between the I²C bus and AMBA AHB. The core is compatible with the Philips I²C standard.
On the I²C bus the slave acts as an I²C memory device where accesses to the slave are translated to AMBA accesses. The core can translate I²C accesses to AMBA byte, halfword or word accesses. The core makes use of I²C clock stretching but can also be configured to use a special mode with clock stretching in order to support systems where limitations of the master or physical layer prevent stretching of the I²C clock period.
For more information, please see the GRLIB IP Core User's Manual