Cobham Gaisler AB provides IP cores and supporting development tools for embedded processors based on the SPARC architecture. We specialize in digital hardware design for both commercial and aerospace applications

USB 2.0 Device Controller

The Cobham Gaisler AB Universal Serial Bus Device controller (GRUSBDC) provides an interface between an USB 2.0 bus and an AMBA-AHB bus. The core is used for implementing USB 2.0 functions providing access to the USB through either an AHB slave or an AHB master interface. The master interface is capable of higher bandwidths but is more complex and requires external memory. The slave interface is simpler and does not require external memory but is more bandwidth limited. UTMI, UTMI+ and ULPI PHYs are supported.

Up to 16 IN and 16 OUT (maximum allowed by the USB 2.0 standard) endpoints can be supported and each can be individually configured for any of the four transfers types with any allowed maximum payload. There is a (technology dependent) limit that restricts how many endpoints can use the maximum payload size but this limit is large enough not to cause any problems in practical cases. 

Some notable features are support for Remote wakeup, soft-connect and scatter-gather DMA. The core has been FPGA proven and is also being used in ASIC projects.

Fore more information please see the GRUSBDC user's manual.


Software drivers are available for Linux 2.6 conforming to the gadget API.  


The GRUSBDC uses approximately 3500 LUTs and 2 blockrams on the Xilinx Spartan 3 technology in the minimum configuration. The maximum frequency is 80 MHz.


The GRUSBDC is available under a commercial license.