GR716B

The GR716B is based on a LEON3FT processor and two real-time accelerators (RTA). It embeds 192 KiB of on-chip RAM memory and it also provides fault tolerant memory controllers to provide access to off-chip memories.

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The list of I/O interfaces includes SpaceWire router, Ethernet, MIL-STD-1553B, CAN, programmable PWM interface, SPI with SPI-for-Space protocols, UART, I2C, GPIO.

The analog functions include radiation hardened cores such as DAC and ADC, analog comparators, precision voltage reference,  PLL and all active parts for a crystal oscillator (XO).

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From a system perspective, the GR716B offers the capability to sense core voltage for trimming of the embedded voltage regulator for low power applications. The LEON3 features single-cycle instructions execution and data fetch from the tightly coupled memories. Execution determinism is guaranteed by the deterministic instruction execution time and fixed interrupt latency.

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Real Time Accelerators
The GR716B includes two real-time accelerators (RTA), whose function is off-loading the main LEON3 processor of demanding real-time control tasks. Each RTA module is an independent isolated LEON3FT subsystem and can execute software in parallel with the main LEON3FT processor. The RTA subsystem can access a tightly coupled memory protected by EDAC to ensure single cycle instruction execution.  It also has access to

• Separate timer possible to synchronize with the main system timer
• Local interrupt controller with start/stop/reset control
• RTA Task Manager (RTA) and interrupt time  stamp functionality

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SpaceWire Router
The GR716B implements a SpaceWire router with two external ports, one internal port and time distribution support. The I/O interfaces are LVDS with extended common-mode, Cold-Spare and Fail-Safe support.

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‍Applications: FPGA Supervisor
The GR716B implements GRSCRUB, an FPGA configuration supervisor responsible for programming and scrubbing the FPGA configuration memory to prevent accumulation of errors. The core is compatible with the Kintex UltraScale and Virtex-5 Xilinx FPGA families and it can be set to scrub the entire FPGA configuration memory or just a smaller area. GRSCRUB accesses the FPGA configuration memory through the SelectMap interface. The supervisor makes use of a golden FPGA configuration file that can be stored in ROM or RAM.

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• System frequency up-to 100 MHz
• SpaceWire links up-to 100 Mbps
• Package options:
  
  • CQFP132 hermetically sealed ceramic
  • PBGA-400 plastic  
  • PBGA-400 plastic with 4 MiB embedded RAM
• TID: up to 100 krad (Si)
• SEL immunity:  118 MeV*cm²/mg

We offer several evaluation boards for the GR716B

• GR716B-MIDI
• GR716-MINI
• GR716-BOARD
• GR-CPCI-GR716-DEV

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We provide compiler toolchains and BSPs with GR716B specific support.

BCC2

Zephyr

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TSIM-GR716 is a cycle-accurate simulator, proving a high precision model for the GR716B with bus timing modeled on a per instruction level. The simulator also provides support for I/O and external memory emulation.

GRMON is a debug tool, optimized for the GR716B and providing a non-intrusive debug environment. It provides execution control with support for the main LEON3FT and the Real Time Accelerators (RTAs).

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