The GR716B is a radiation-hardened microcontroller featuring the fault-tolerant LEON3 SPARC V8 processor. Based on the GR716A design, the GR716B has been developed to provide higher computational performance and excellent communication interfaces.
This page describes a running development and no guarantees can be given concerning future product availability. All information on this page is subject to change without notice. Please click this link to sign up to receive notifications about product and documentation updates.
- System frequency up-to 100 MHz
- SpaceWire links up-to 200 Mbps
- CQFP132 hermetically sealed ceramic package
- Total Ionizing Dose (TID) up to 300 krad (Si) (TBC)
- Single-Event Latch-up Immunity (SEL) to LETTH > 118 MeV-cm2mg (TBC)
- Single-Event Upset (SEU) below TBD errors per device and day in space environment
- Support for single 3.3V supply
The GR716B is based on a LEON3FT processor and two real-time accelerators (RTA). It embeds 192 KiB of on-chip RAM memory and it also provides fault tolerant memory controllers to provide access to off-chip memories.
The list of I/O interfaces includes SpaceWire router, Ethernet, MIL-STD-1553B, CAN, PacketWire, programmable PWM interface, SPI with SPI-for-Space protocols, UART, I2C, GPIO.
The analog functions include radiation hardened cores such as DAC and ADC, analog comparator, precision voltage reference, power-on reset, brownout detector, low drop-out regulator (LDO), PLL and all active parts for a crystal oscillator (XO).
From a system perspective, the GR716B offers on-chip voltage regulators for single supply support and the capability to sense core voltage for trimming of the embedded voltage regulator for low power applications. The LEON3 features single-cycle instructions execution and data fetch from the tightly coupled memories. Execution determinism is guaranteed by the deterministic instruction execution time and fixed interrupt latency.
Real Time Accelerators
The GR716B includes two real-time accelerators (RTA),
Applications: FPGA Supervisor
The GR716B implements GRSCRUB, an FPGA configuration supervisor responsible for programming and scrubbing the FPGA configuration memory to prevent accumulation of errors. The core is compatible with the Kintex UltraScale and Virtex-5 Xilinx FPGA families and it can be set to scrub the entire FPGA configuration memory or just a smaller area. GRSCRUB accesses the FPGA configuration memory through the SelectMap interface. The supervisor makes use of a golden FPGA configuration file that can be stored in ROM or RAM. Such file is available for configuring the FPGA at start-up and/or to repair the FPGA configuration memory in case of errors. The file also stores the mask data and the Cyclic Redundancy Check (CRC) codes used to check the configuration bitstream integrity.
Applications: Switching power applications
GR716B has integrated dedicated hardware to support at least 4 independent digitally-controlled DC/DC converters. It also supports complex switching power converters such as various full-bridge topologies. The overall real-time execution capability to support DC/DC applications is secured by tight integration between the real-time accelerator (RTA) and the hardware functionality such as integrated ADC, DAC, etc. To support a wide variety of power-supply applications GR716B provides RTAs in which the user can write application-specific software. In addition, general hardware, directly accessible from the RTAs, is implemented to execute all real-time functions that are time critical down to system-clock cycle level, such as PWMs, etc
Applications: Motor Drive
The GR716B architecture supports at least 4 brushless direct current (BLDC) motors or 4 permanent magnet synchronous motors (PMSM), in PWM control mode, or 6 micro stepper motors, or a combination of DC/DC controllers and different motors. The integrated hardware support for full-bridge and half-bridge power-converter topologies can be used to control a variety of different motor types. In motor control applications, hardware support for power converters can be combined with the ability to configure ADC measurements on at least 3 analog channels with simultaneous sampling time point for optimum motor regulation.
Integrated Analog functions
Software Development Environment (SDE)
We provide compiler toolchains and development tools with GR716B-specific support such as the GR716B BSPs, GRMON support, and simulator CPU/IO models. The Bare-metal environment is free and open-source. The GR716-MINI board can be evaluated using the free GRMON3 evaluation version.
Our SDE for the GR716 consists of the following software components:
The GR716B microcontroller is currently in the development phase and there is no guarantee that a flight part will be developed, qualified or sold.
GR716B Data Sheet and User’s Manual