CCSDS ECSS

The spacecraft data handling IP cores cover the following functions:

• CCSDS/ECSS Telemetry Encoder
• CCSDS/ECSS Telemetry Encoder - Descriptor
• CCSDS/ECSS Telemetry Encoder - Virtual Channel Generation
• CCSDS/ECSS Telemetry Encoder - Virtual Channel Generation Input - AMBA
• CCSDS/ECSS Telemetry Encoder - Virtual Channel Generation Input - Packet Wire
• CCSDS/ECSS Telemetry Encoder - CLCW Receiver
• CCSDS/ECSS Telemetry Encoder - CLCW Multiplexer
• CCSDS/ECSS Telemetry Encoder - Geffe Generator
• CCSDS/ECSS Telemetry Receiver
• CCSDS/ECSS Convolutional Encoder and Quicklook Decoder
• CCSDS/ECSS Telecommand Decoder
• CCSDS/ECSS Telecommand Decoder - Hardware Commands
• CCSDS/ECSS Telecommand Decoder - UART
• CCSDS/ECSS Telecommand Decoder - CLCW Transmitter
• CCSDS/ECSS Telecommand Decoder - COP-1
• CCSDS/ECSS Telecommand Transmitter
• CCSDS Time Manager - with datation and pulse generation
• CCSDS 121/123 Lossless Data Compression
• SpaceWire - CCSDS Unsegmented Code Transfer Protocol
• PacketWire Interface - acts as a master on the AMBA AHB bus providing remote control
• PacketWire Receiver - acts as master with DMA on AMBA AHB bus
• PacketWire Transmitter - acts as master with DMA on AMBA AHB bus
• PacketWire Receiver Interface - acts as a slave on the AMBA APB bus
• PacketWire Transmitter Interface - acts as a slave on the AMBA APB bus
• Packet Parallel Interface - acts as a slave on the AMBA AHB bus
• General Purpose Input Output - with pulse generation
• General Purpose Timer Unit- with external clock input, event outputs, and datation latch
• Reconfiguration Module
• Version and Revision information register

Lossless Data Compression

The SHyLoC CCSDS121 and CCSDS123 IP cores implements the CCSDS 121.0-B-2 and 123.0-B-1 standards for lossless data compression, respectively. The cores are available as stand-alone cores and are also delivered with an AMBA wrapper with a register interface and a DMA engine.

The cores are portable and can be implemented on most FPGA and ASIC technologies, and have been tested for Microsemi RTAX and RT ProASIC3, AMD/Xilinx Virtex and Kintex FPGA technologies.

The CCSDS/ECSS IP cores listed above, with a few exceptions, are licensed together under a single commercial TMTC license. The following cores are not included and are licensed separately:

• GRRM - Reconfiguration Module
• CCSDS 121/123 Lossless Data Compression

Contact us or request a quote for licensing information.

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