NOEL3

The NOEL3 is a barrel processor with multiple execution threads (harts). Each hart executes one instruction in the pipeline at any time. The processor switches between harts every clock cycle, so each hart executes instructions at a rate of the clock frequency divided by the number of harts.

This architectural choice improves the maximum achievable frequency and provides execution predictability as all harts execute with deterministic timing.  By avoiding the need for logic to resolve data and control hazards, the design avoid difficult verification problem for microprocessor cores. This is expected to lower the efforts of design audits and to make the design certifiable.

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The tightly coupled memories are safeguarded by SECDED EDAC code, and a hardware scrubber prevents the accumulation of errors in these memories.

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Technology agnostic VHDL with optimizations for Lattice Certus/CertusPro, AMD Ultrascale and Versal, Microchip RTG4 and PolarFire, and NanoXplore FPGAs.

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