Gaisler Releases LEON5 Processor IP Core

We have announced at the 12th Annual Workshop on Spacecraft Flight Software, at NASA Marshall Space Flight Center, that we will release a new processor Intellectual Property (IP) core based on the SPARC instruction set architecture (ISA). The new LEON5 processor IP core, which succeeds the previous LEON4 processor, will be made available on 25 December for download into Xilinx’ Kintex UltraSCALE FPGAs.

Read the press release