Articles

 

 

NSREC 2022

NSREC 2022

CAES's Space Systems Division will be attending NSREC next week, July 18-22, in Provo, UT. Stop by booth #206/207 to learn more about our amazing space technologies.

Access the event


ASAP 2022

CAES is the main sponsor, keynote presenter and exhibitor at the 33rd IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2022) event that is held virtually during 12-14 July 2022. Our Director of Engineering will give the industrial keynote address at this event organized by Chalmers University of Technology from hour hometown Gothenburg, Sweden. The topic is "Designing Microprocessors for Space Applications: Why, How, Trends, State-of-the-Art – and open source hardware!" and will be covering our SPARC and RISC-V open-source processors. 

Please sign up freely and attend this free virtual conference made possible by CAES!

Access the event


Embedded World

Embedded World 2022

CAES is sponsor, presenter and exhibitor in the RISC-V International's booth at Embedded World 21-23 June 2022, in Nuremberg, Germany. CAES will present the "NOEL-V, a Configurable 32-Bit and 64-bit RISC-V IP".

Access the event


QML-V and QML-Q Space Grade Qualification of the GR740 Quad-Core LEON4FT Microprocessor

Our Fault-Tolerant GR740 Quad-Core LEON4FT microprocessor device has successfully completed Defense Logistics Agency (DLA) qualification and can continue to meet some of the most demanding processing challenges of future space missions, with the added assurance of QML pedigree.

Read the full Press Release 


HiPEAC 2022

CAES is co-hosting the De-RISC workshop during HiPEAC on 20 June, 2022, in Budapest, Hungary. The De-RISC (Dependable Real-time Infrastructure for Safety-critical Computer) project addresses computer systems within the space and aviation domains. De-RISC is a project where an international consortium will introduce a hardware and software platform based around the RISC-V ISA. The work in this project is to productize a multi-core RISC-V system-on-chip design already owned by CAES and to port the XtratuM hypervisor owned by fentISS to that design to create a full platform consisting of hardware and software for future European developments within space and aeronautical applications.

Access the event


 

SEE/MAPLD 2022

CAES is exhibiting at the Single Event Effects (SEE) Symposium and Military and Aerospace Programmable Logic Devices (MAPLD) combined workshop. Our colleague from Gothenburg is presenting the "GR765 LEON5FT System-on-Chip: Results of First STM 28nm Test Chip Radiation Test Campaign" paper. The GR765 is a future system-on-chip product in development that provides a octa-core fault-tolerant LEON5FT SPARC V8 processor system, 12-port SpaceWire router, 10/100/1000 Mbit Ethernet interfaces, high-speed serial links, embedded FPGA fabric and CAN-FD interfaces.

Access the event


 

DASIA (Data Systems In Aerospace) 2022

This year's DASIA (Data Systems In Aerospace) virtual conference is sponsored by CAES. Our colleagues will be presenting two papers at the DASIA this year: "GR765-LEON5FT Multi-Processor SoC" and "GOMX-5 APPs - The Advanced Payload Processors IOD for the GOMX-5 Mission"We are also participating in the "Artificial Intelligence for High-performance Human Space Flight Avionics Systems" paper being presented at the conference.

Access the event


4S Symposium 2022

Our colleagues will be presenting a paper  at the 4S Symposium this year, "GOMX-5 APPs - The Advanced Payload Processors IOD for the GOMX-5 Mission". The Advanced Payload Processors (APPs) was developed targeting in-orbit demonstration (IOD) in the GOMX-5 mission. GOMX-5 is a flight demonstration for next generation cubesat missions, which will demand advanced attitude control, large processing capabilities, and high throughput data exchange between space and ground segments.

Access the full paper 

Access the event


CAES and Ashling announce Ashling’s RiscFree™ C/C++ Toolchain for CAES’ NOEL-V® Processors

Ashling and CAES announced today that Ashling’s RiscFree Toolchain will provide software development support for CAES’ NOEL-V fault tolerant RISC-V based processors. RiscFree is Ashling’s Integrated Development Environment (IDE) including a Compiler and Debugger and provides software development and debug support for NOEL-V. 

Read the full Press Release 


Collaboration with Lattice Semiconductor to provide Radiation-Tolerant FPGAs for distributed satellite computing applications

CAES, a leading provider of mission critical electronics for aerospace and defense, and Lattice Semiconductor Corporation, the low power programmable FPGA leader, announce today an agreement whereby CAES will qualify and sell radiation-tolerant Lattice FPGAs for space and satellite applications. We are actively developing a port of our proven GRLIB development environment and a library of configurable, standardized soft IP design cores to further support customer needs as they integrate these FPGAs into their designs. This will include our new fault-tolerant NOEL-V processor soft IP core implementing the RISC-V International instruction set architecture. 

Read the full Press Release


Flight Software Workshop 2022

 This year’s Flight Software Workshop is ongoing and we are proud to be a sponsor again. The Johns Hopkins University is virtually hosting the event and many presentations have been prerecorded and available on YouTube. Take the opportunity to listen to our  “LEON5 Fault Tolerant Processor IP and ongoing Developments” presentation covering our fault-tolerant LEON5FT processor core.

Access the presentation.



Awarded ESA contract to develop RISC-V based System-on-Chip for space applications

We have been awarded a contract with the European Space Agency (ESA) to develop a fault- and radiation-tolerant system-on-chip. Funded by the Swedish National Space Agency, the project will improve performance and power efficiency in satellite and spacecraft applications by developing a 16-core, space-hardened microprocessor based on the open RISC-V instruction set architecture (ISA). The GR7xV processor is based on the NOEL-V processor IP core and will be designed into spaceborne controls and payload data management and processing systems to enable new kinds of observational, communication, navigational and scientific missions and services. These include advanced, flexible telecommunications satellite payloads, scientific and earth-observation payloads and robotics systems such as planetary exploration rovers.

Read the full Press Release


The Swedish Cyber Security Collaboration Conference

We are presenting the "Certifierbara system-på-kisel för säkerhets-kritiska tillämpningar inom industrin" paper at the Swedish Cyber Security Collaboration Conference on 2nd of December. The presented work is based on our NOEL-V processor implements the RISC-V International instruction set architecture.

Access the event.


 

ESA's Industry Space Days 2021

Meet our team in our Identify trends and business opportunities within the space sector during the online Industry Space Days. Hear from ESA as well as new, emerging and established players in the European space industry, showcase your products and services and meet future partners when attending the ISD 2021 – The conference edition.

Access the event.

 


RISC-V Summit 2021

Our colleagues will be presenting two papers at the RISC-V Summit this year: "Radiation Hardening and Fault-Tolerance Features of the NOEL-V Processor" and "Adding H Support to the NOEL-V Microprocessor". RISC-V Summit brings the community together to show the power open collaboration can have on the processor industry. The audience spans across industries, organizations, workloads, and geographies to learn about the technology advancements in the RISC-V ecosystem and visibility of RISC-V successes.

Access the event.


D&R IP SoC Conference 21

We are exhibiting and presenting the "Feature set extensions of NOEL-V, a configurable 32-bit and 64-bit RISC-V IP" paper at the D&R IP SoC Conference 21 in Grenoble, France, 1st and 2nd of December 2021. Our NOEL-V processor implements the RISC-V International instruction set architecture.

Access the event.


15th ESA Workshop on Avionics, Data, Control and Software Systems (ADCSS)

We are virtually exhibiting and presenting the "The Advanced Payload Processors (APPs) IOD for the GOMX-5 Mission" at the 15th ESA Workshop on Avionics, Data, Control and Software Systems (ADCSS). The APPs payload will demonstrate in orbit several technologies developed under European Space Agency - ESA funding, including the GR740 quad-core microprocessor in plastic package, the GR716A microcontroller, as well as the SQUAL4c test chip implemented on 28nm FDSOI GEO P2 space technology from STMicroelectronics, featuring the LEON5 processor and the NOEL-V processor (implementing the RISC-V International instruction set architecture).

Access the event.


Space Tech Expo 2021

We are showcasing our our high-performance SPARC and RISC-V space processors at Space Tech Expo - Europe, in Bremen during 16 through 18 November. Visit the CAES booth in stand number K33. 

Access the event.


 

JAXA Microelectronics Workshop 2021

We are presenting the evolution of our high-performance SPARC and RISC-V space processors at the Microelectronics Workshop (MEWS34) arranged by JAXA - Japan Aerospace Exploration Agency. 

Access the event.


Rymdforum 2021

The Rymdforum 2021 conference (the Swedish biennial Space Forum) will present news, explore trends, and open for dialogue and discussions related to space activities. The conference will take place in Gothenburg, 10-12 October 2021. Together with the Chalmers University of Technology and the City of Gothenburg, we will be arranging the conference. Follow the progress of the conference on social media and on the conference web site. Meet also our colleagues in our exhibit booth!

Access the event.


 

Astronomins Dag och Natt 2021

The Astronomins dag och natt event takes everything that is exciting about astronomy and the universe and makes it accessible to everyone in Sweden. This year it will be the tenth anniversary of the event which is coordinated by the Swedish Astronomical Society. We are proud to be contributing with a presentation on space computing as part of the main program at Tekniska museet in Stockholm, as well as contributing to the Space theme day at Lövgärdesskolan in Gothenburg in collaboration with Chalmers University of Technology, the City of Gothenburg and its largest housing company Poseidon.

Access the event.


DAta Systems In Aerospace 2021 

Meet us and our colleagues at the Industrial Exhibit at the DAta Systems In Aerospace 2021 conference. Don't miss our four papers to learn more about our LEON5 and NOEL-V next generation processor models for space, the reference hardware and software design for a GR740 single board computer, our radiation hardened GR716 series of microcontrollers, and our High Performance Compute Board based on COTS acceleration. Please also have a look the De-RISC project which is a dependable real-time RISC-V infrastructure for safety-critical space and avionics computer systems presented by our partner fentISS.

Access the conference.


 

Radiation and its Effects on Components and Systems 2021 

Meet us and our colleagues at the Industrial Exhibit at the Radiation and its Effects on Components and Systems 2021 conference. Don't miss our poster at the data workshop to learn more about our radiation testing results of Artificial Intelligence COTS devices.

Access the conference.


 

Enabling Critical Infrastructure for Next Generation Lunar Landers 

We have been selected by Astrobotic Technology, a space robotics company, to supply flight control processors and critical infrastructure microelectronics for the Peregrine and Griffin lunar landers that will study the surface of the Moon. With the industry’s largest portfolio of radiation hardened products specifically designed for space, this new mission marks a return trip to the moon for CAES microelectronics. The GR712RC, a LEON3FT SPARC V8 processor, will serve as the mission flight computer and will provide low power, multi-core capability. Also embedded in each mission’s flight control suite are several other CAES’ radiation hardened devices.

Read the full Press Release


 

Contract from Vinnova to Advance High Performance RISC-V Space Computing 

We have been awarded a contract from Vinnova, a Swedish government agency dedicated to promoting innovation, to develop next generation RISC-V based space computing capabilities. The results from this development will allow future microprocessors to enable spacecraft control, create high performance payload processing and will feature timing isolation for software applications and prevent interference from other parts of the system. The new NOEL-V fault-tolerant, 64-bit processor core is based on the open RISC-V instruction set architecture and builds upon our heritage with the SPARC/LEON architecture. It marks the newest addition to our trusted fault tolerant space computing product portfolio.

Read the full Press Release


 

Nuclear & Space Radiation Effects Conference 2021 

Meet us and our colleagues at the Industrial Exhibit at the Nuclear & Space Radiation Effects Conference 2021. Don't miss our webinar at NSREC to learn more about our leading radiation hardened solutions and capabilities.

Access the conference.


GR740 SBC and HPCB with GR716A presented at OBDP 2021 

The "GR740 Single Board Computer" and "High-Performance Compute Board - a Fault-Tolerant Module for On-board Vision Processing" developments will be presented at the 2nd European Workshop on On-Board Data Processing (OBDP 2021), 14-17 June 2021. Both developments are done together with multiple partners in the frame of contracts with the European Space Agency. The GR740 SBC reference design is based on the rad-hard GR740 quad-core LEON4FT microprocessor, while the HPCB board features a state of the art low-power COTS AI chip and the rad-hard single-core LEON3FT GR716A microcontroller. Both boards also feature high-end FPGA devices to provide flexibility to the user.

Access the conference.



GR740 and GR716A Presented at ESA CubeSat Industry Days 2021 

The "Advanced Payload Processors IOD for the GOMX-5 Mission" will be presented at the 5th ESA CubeSat Industry Days, 1-3 June 2021. The presentation covers the complete in-orbit demonstrator, with contribution from several European and international partners, and specifically focuses on the GR740 quad-core LEON4FT mircoprocessor in the new plastic package and the GR716A single-core LEON3FT microcontroller. The presentation will also cover a new test chip on 28nm technology that includes the recently released super-scalar LEON5 and NOEL-V processor IP cores that will also be demonstrated in orbit. 

Access the conference.


 

GR716 Microcontroller Presented at AMICSA 2021 

The GR716 microcontroller family will be presented at the 8th International Workshop on Analogue and Mixed-Signal Integrated Circuits for Space Applications, 25 – 28 May 2021. The AMICSA workshop provides an international forum for the presentation and discussion of recent advances in analogue and mixed-signal VLSI design techniques and technologies for space applications.

Access the conference.


 

  

Contract signed with the European Space Agency for New Advanced Space Processor 

As a leader in advanced mission-critical electronics, we announced today that we have received a contract from the European Space Agency (ESA) to fund the first phase to develop a new advanced processor for space applications. Developed in Sweden and based on the popular LEON5FT Fault Tolerant Processor Core, the GR765 Microprocessor meets market demand for high-performing processors, offering a higher level of integration with more functionality on the chip to reduce weight and keep power consumption low.

Read the full Press Release


  

Our microelectronics arrive on Mars to Help Pioneer the Future of Space Missions

We have processor also onboard UAE’ HOPE spacecraft in orbit around the Red Planet, as well as it’s bigger brother GR712RC LEON3FT dual-core microprocessor on ESA’s ExoMars Trace Gas Orbiter, which will relay data back from Perseverance.

Read the full article


  

Daiteq

Daiteq Selected as the First ESA NOEL-V User

We have proudly announced from the RISC-V Summit that its new NOEL-V processor model is in use by daiteq’s European Space Agency (ESA) research activity, “Evaluation and Instruction Set Extension of a RISC-V Soft Core for Space".

Read the full Press Release



 

NOEL-V Processor Support Introduced for Wind River VxWorks RTOS

We have proudly announced at the RISC-V Summit the availability of Wind River’s real-time operating system VxWorks for the NOEL-V processor IP core.

For more than 15 years, the partnership has provided customers with VxWorks for the fault tolerant LEON3FT and LEON4FT processor families and other space-grade microprocessors. Wind River recently introduced RISC-V support in Simics and VxWorks, for which the NOEL-V BSP has been developed. Now we can together with Wind River strengthen the partnership to include RISC-V and NOEL-V.

Read the full Press Release.


  

Deepened Collaboration around RISC-V with fentISS 

We have proudly announced at the RISC-V Summit that fent Innovative Software Solutions (fentISS), a developer of software solutions specifically designed for critical real-time embedded partitioned systems, has agreed to mutually promote flagship products NOEL-V and LEON5 processors and the XtratuM Next Generation (XNG) hypervisor.

Read the full press release.


 

NOEL-V Support for Microchip Technology’s PolarFire® FPGA Devices 

We have proudly announced at the RISC-V Summit that two of its new processor models are now available for Microchip’s PolarFire FPGA devices. The LEON5 SPARC V8 32-bit processor is a continuation of the successful LEON line of processor models primarily used within space applications. The NOEL-V is now also released in a 32-bit version as part of the processor product line that implements the open instruction set architecture from RISC-V International.

Read the full press release.  


 

 

Porting PikeOS to NOEL-V and LEON: Extend Cooperation with SYSGO around RISC-V 

As RISC-V international members, we have together with SYSGO have announced a collaboration to deliver SYSGO's hypervisor-based real-time operating system, PikeOS, ported onto our IP cores NOEL-V and LEON. 

Read the full press release.

 


 

SELENE: Self-monitored Dependable platform for High-Performance Safety-Critical Systems

High-performance computing that employs commercial off-the-shelf components offers an alternative path to increasing the computational capability of safety-critical applications. Despite their potential in a number of domains, use of these systems is limited due to the lack of certified, reliable hardware platforms. The EU funded SELENE project aims to change this by proposing a safety-critical cognitive computing platform with self-aware and self-adaptive capabilities. Cobham Gaisler's NOEL-V processor implementing the RISC-V instruction set architecture is used in the project. 

Read more on the project page.  


 

 

Cobham Advanced Electronic Solutions’ GR712RC Processor Runs CHEOPS’ Instrument Flight Software

The first ESA S-class mission CHEOPS, which stands for CHaracterising ExOPlanet Satellite, recently lifted off on a Soyuz rocket from Europe's spaceport in Kourou. The satellite contains one payload, a 32 cm diameter on-axis telescope. The Data Processing Unit (DPU) within the Back-End Electronics (BEE) of the telescope was built by the Space Research Institute (Institut für Weltraumforschung, IWF) of the Austrian Academy of Sciences in Graz, Austria. The DPU is based on the Radiation-Hardened GR712RC LEON3FT Dual-Core Microprocessor. 

Read the full press release.  


 

See the LEON5 and NOEL-V video clip

The Gothenburg Symphony Orchestra has produced our video clip promoting the new LEON5 and NOEL-V processor IP cores that will be released on 25 December for  download into Xilinx’ Kintex UltraSCALE FPGAs. The original music score has been composed by Hans Ek who has also conducted the Gothenburg Symphony Orchestra when it was performed  as part of Kosmische Musik at the Gothenburg Concert Hall on 27 October 2018, 


 

Cobham Releases RISC-V Processor IP Core

Cobham Gaisler has announced  at the RISC-V Summit in San Jose, California, that it will release a new line of processor Intellectual Property (IP) cores that implements the RISC-V instruction set architecture (ISA). The NOEL-V processor IP core, the first product in the family, will be made available on 25 December for download into Xilinx’ Kintex UltraSCALE FPGAs.

Read the full press release.  


 

Cobham Releases LEON5 Processor IP Core

Cobham Gaisler has announced at the 12th Annual Workshop on Spacecraft Flight Software, at NASA Marshall Space Flight Center, that it will release a new processor Intellectual Property (IP) core based on the SPARC instruction set architecture (ISA). The new LEON5 processor IP core, which succeeds the previous LEON4 processor, will be made available on 25 December for download into Xilinx’ Kintex UltraSCALE FPGAs.

Read the full press release.  


 

 

Lift off: De-RISC to create first RISC-V, fully European platform for space

Launched on 1 October 2019, the European Innovation Action De-RISC is preparing a full hardware-software platform based on RISC-V for the space and aviation market.Combining a multicore system-on-chip by leading space solutions provider Cobham Gaisler with fentISS’ space-qualified XtratuM hypervisor, De-RISC will create a market-ready platform to power future space and aeronautical applications with made-in-Europe technology.

Read the full press release


 

Press releasee

ESA Supports Development of Cobham’s GR740 Microprocessor in Organic Package

Cobham Gaisler has announced that they have successfully negotiated a contract with the European Space Agency (ESA) leading to the development and validation of its GR740 Quad-Core LEON4FT Microprocessor in an Organic Package. Cobham Gaisler will lead this joint development effort with semiconductor supplier STMicroelectronics (NYSE: STM) and Synergie Cad PSC (France). This development will help meet market demand for high reliability, low cost components for large constellations and new space applications. 
Read the full press release


Cobham Awarded Contract from European Space Agency for GR740 SBC Reference Design

Cobham Gaisler has announced it is leading a consortium for a new development contract from the European Space Agency (ESA). Cobham Gaisler and RUAG Space, both located in Gothenburg, Sweden, with specification input from Airbus Defense and Space, Thales Alenia Space and OHB Systems, will together design a reference design and basic software for a single board computer (SBC) based on the GR740 Quad-Core LEON4FT Microprocessor. 
Read the full press release.


DLR Utilizes Cobham’s Dual-Core Processors in Eu:CROPIS Satellite and Next Generation Payload Demonstrator

Cobham Gaisler and DLR (German Aerospace Center) announced that Cobham’s GR712RC Dual-Core LEON3FT Processor has been successfully used to control the Eu:CROPIS (Euglena Combined Regenerative Organic Food Production in Space) satellite for more than 350 days in orbit. In addition, the GR712RC is also used in DLR’s SCalable On-BoaRd Computing Experiment (SCORE) payload.
Read the full press release.


GR740 USer Day

GR740 User Day at ESTEC

The GR740 User Day will take place in the Erasmus Auditorium at ESTEC, Noordwijk, and is free of charge and will be open to the public.

The presentations are available on-line


ESA contract for High-Performance Compute Board

A development contract has been awarded from ESA to a Cobham Gaisler lead consortium that will result in the design of an accelerator board suitable for Computer Vision (CV) and Artificial Intelligence (AI) applications for in-orbit space use. 
Read the full press release.


     

Follow us on Twitter and LinkedIn

 Follow us on Twitter @cobhamgaisler and LinkedIn Cobham Gaisler.


 SBS3740

DDC's New 3U SBC Incorporates Cobham Processor Technology

Data Device Corporation (DDC) and Cobham Gaisler jointly announced at the RADECS (RADiation Effects on Components and Systems) Conference that the radiation-hardened GR740 Quad-Core LEON4FT (Fault-Tolerant) Processor device will be used in DDC’s latest Rad-Hard Single Board Computer (SBC), the SCS3740. Read the full press release.


 Rymdveckan

 Cobham Gaisler will participate in Rymdveckan, or "Space Week" that will be held in Gothenburg, Sweden, between 14th and 22nd of September. Read the full details of our engagement.


VESTA-1 

Cobham Processor Technology Powers Commercial NanoSatellite

Cobham Gaisler’s LEON3FT processor technology is used on the VESTA-1 nanosatellite developed and operated by Surrey Satellite Technology Ltd (SSTL). SSTL has recently confirmed the successful commissioning and operation of VESTA-1, a 3U nanosatellite technology demonstration mission that will test a new two-way VHF Data Exchange System (VDES) payload developed by Honeywell for the ExactEARTH advanced maritime satellite constellation. Read the full press release


RISC-V

Cobham Joins RISC-V Foundation

Cobham Gaisler has announced that is has recently been accepted as a Gold-Level Member of the RISC-V Foundation and intends to release products based on the RISC-V ISA in parallel with the further development of its LEON SPARC processor based products. The initial RISC-V product will be a RV64GC compliant processor Intellectual Property (IP) core written in VHDL. Read the full press release.


 

GRMON 3.0 release now available 

Cobham Gaisler released in March 2018 the new GRMON3 debug monitor. In addition to the features found in previous GRMON versions a new graphical user interface greatly extends the traditional monitoring and control capabilities. Please see the GRMON3 product page for more information. 

 


 

Join us at the virtual RISC-V Summit in December

We will be presenting the latest updated on the NOEL-V processor implementing the RISC-V Instruction Set Architecture (ISA) at the RISC-V Summit on December 8-10, 2020. Use the discount code in the picture above to register and meet us in our virtual booth, enjoy our Tech Talk on The Case for RISC-V in Space Applications, listen to our presentation on NOEL-V: A new high-performance RISC-V processor family and also listen to Jaume Abella's (Barcelona Supercomputing Center) presentation on Tackling Safety in Space with RISC-V Based Platforms.


 

GOMX-5

Cobham Gaisler to fly GR740 and GR716 on ESA's GOMX-5 mission 

GomSpace A/S and the European Space Agency (ESA) have signed a contract to continue the development of the GOMX-5 mission, focused on demonstrating new nanosatellite capabilities in space, particularly for next generation constellations in Low Earth Orbit. GOMX-5 mission will consist of a 12U nanosatellite in the 20kg class to be launched in Q2 2022. The satellite will host several advanced payloads, including the powerful radiation-tolerant Advanced Payload Processors (APPs) including a GNSS Software receiver. The APPs payload will be jointly developed by us, GMV, LIRMM and UFSC. We will fly its GR740 quad-core LEON4FT processor in a organic package and the GR716A deterministic single-core EON3FT microprocessor. 

Read the full press release from GomSpace.


 

ESA Contract awarded for Development of New LEON3FT Microcontroller for Space Applications

We have proudly announced today that it has received a contract from the European Space Agency (ESA) for the development and validation of a new mixed-signal LEON3FT microcontroller. This development helps meet market demands for high reliability, radiation-hardened microcontrollers based on the existing LEON processor technology. The GR716B LEON3FT Microcontroller is based on its previous joint ESA collaboration Microcontroller for Embedded Applications resulting in the GR716 series of microcontrollers for radiation-hardened mixed signal processing applications.

Read the full press release.


 

Cobham's RadHard Microelectronics Assist in Study of Sun and Earth Connection

We have proudly announced today that an abundance of its radiation hardened (RadHard) and high reliability solutions are assisting in the European Space Agency’s (ESA) Solar Orbiter Mission. 

Read the full press release.



Cobham Gaisler joins Swedish Aerospace Industries

We have recently been accepted as a member of the Swedish Aerospace Industries association. The Swedish Aerospace Industries is a non-profit association and industry organization whose purpose is to safeguard the interests of its members by representing the Swedish civil aviation and space industry on common issues where a national and industry representative association is needed, or where a joint or coordinated activity is deemed otherwise suitable.

Read the full press release.


 

 

Rymdforum 2021 to be hosted by Cobham Gaisler, Chalmers University of Technology and the City of Gothenburg

The Rymdforum 2021 conference (the Swedish biennial space forum) will present news, explore trends, and open for dialogue and discussions related to space activities. The conference will take place in Gothenburg, 21-23 March 2021. Together with the Chalmers University of Technology and the City of Gothenburg, we will be arranging the conference. Follow the progress of the conference on social media and on the conference web site.

@rymdforum2021 #rymdforum2021 #rymd2021

Visit the conference web site.


Xilinx

Cobham Advanced Electronic Solutions Radiation Hardened Microelectronics Support New Xilinx XQRKU060 FPGA

We have announced today that a variety of our radiation hardened (RadHard) solutions and Intellectual Property (IP) cores for space applications, provide support for the new Xilinx Radiation Tolerant (RT) Kintex UltraScale XQRKU060 Field-Programmable Gate Array (FPGA). We provide the IP cores to be used with the XQRKU060.

The GRSRCUB FPGA scrubber and supervisor IP core supports programming the XQRKU060 and several periodic scrubbing modes to prevent accumulation of errors in the FPGA configuration memory.

Our GRLIB IP library that contains over 100 peripheral IP cores together with the NOEL-V RISC-V processor and the LEON3FT and LEON5FT SPARC processors have been adapted to support system-on-a-chip designs targeting the XQRKU060.

Read the full press release.