Cobham Gaisler AB provides IP cores and supporting development tools for embedded processors based on the SPARC architecture. We specialize in digital hardware design for both commercial and aerospace applications

Exploring Register File and Memory Organization in ASIP Synthesis


Manoj Kumar Jain, Department of Computer Science & Engineering, Indian Institute of Technology Delhi

An Application Specific Instruction Set Processor (ASIP) is a processor designed for one particular application or for a set of specific applications. An ASIP exploits special characteristics of the given application(s) to meet the desired performance, cost and power requirements. A typical ASIP design flow includes key steps such as application analysis, design space exploration, instruction set generation, code generation for software and hardware synthesis. Compiler-simulator based approach is however not suitable for an early design space exploration. In the domain of Application Specific Instruction set Processors (ASIP), this problem can be solved by scheduler based approaches, which are much faster.