Design Flow for HW / SW Acceleration Transparency in the ThumbPod Secure Embedded System

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David Hwang dhwang@ee.ucla.edu Alireza Hodjat ahodjat@ee.ucla.edu Shenglin Yang shengliny@ee.ucla.edu Patrick Schaumont schaum@ee.ucla.edu Bo-Cheng Lai bclai@ee.ucla.edu Ingrid Verbauwhede ingrid@ee.ucla.edu Yi Fan yifan@ee.ucla.edu Kazuo Sakiyama kazuo@ee.ucla.edu

This paper describes the design flow of a secure embedded system called ThumbPod, which uses cryptographic and biometric signal processing acceleration. It presents the new concept of HW/SW acceleration transparency, which is a systematic method to accelerate Java functions in both software and hardware. An example is given which traces a Rijndael encryption function from Java software to accelerated hardware, showing a cycle count improvement of 333X. Details of the hardware embedded platform, design flow, functional simulation, and testing strategy are also introduced.