Cobham Gaisler AB provides IP cores and supporting development tools for embedded processors based on the SPARC architecture. We specialize in digital hardware design for both commercial and aerospace applications

LEON-V5QV

Introduction

The LEON processors and GRLIB IP library has support for the space-grade Xilinx Virtex-5QV FPGA. The Virtex-5QV support leverages the GRLIB Xilinx technology support that consists of a techmap layer that wraps specific technology elements such as memory macros and pads. GRLIB also contain template designs for a wide range of Xilinx development boards, including the Xilinx ML510 development board that is considered to be a good commercial option for prototyping V5QV designs. The GRLIB IP library infrastructure automatically builds project files for Xilinx ISE and synthesis tools such as Mentor Precision and Synopsys Synplify. More information about GRLIB and Cobham Gaisler IP cores is available on the SoC library page.

Example designs

The GRLIB IP library bitfiles package prebuilt includes bitstreams for development boards such as Xilinx ML510. The bitstreams can be used together with GRMON3 debug monitor - including the GRMON3 evaluation version.