Synplicity Hardware Platforms Group is a leading provider of off-the-shelf ASIC prototyping boards. The key product is HAPS™ (High-performance ASIC Prototyping System),
a modular system with multi-FPGA motherboards and standard or custom-made daughter boards which can be stacked together in a variety of ways.

Aeroflex Gaisler's GRLIB IP library environment includes support for HAPS™ development platforms, providing example designs and board support packages used with Synplicity's synthesis tools and Xilinx’ place & route tools.

Aeroflex Gaisler's HAPS™ development suite comprises everything needed in order to develop a LEON3 based system-on-a-chip design for a HAPS™ platform. The suite includes:

•   GRLIB VHDL IP library , containing LEON3 source code, HAPS™ specific IP cores etc.
•   Synplicity HAPS™ template designs (HAPS-31 , HAPS-51 , HAPS-52 , HAPS-54 etc.)
•   Bare-C Cross-compiler system (BCC)
•   GRMON debug monitor software

The Aeroflex Gaisler HAPS IP cores cover the following functions:

• FLASH_1X1 32/16-bit PROM Controller for HAPS™ FLASH_1x1
• SRAM_1X1 32-bit SSRAM / PROM Controller for HAPS™ SRAM_1x1
• SDRAM_1X1 32-bit SDRAM Controller for HAPS™ SDRAM_1x1
• DDR_1X1 DDR266 Controller for HAPS™ DDR_1x1
• GEPHY_1X1 Ethernet Controller for HAPS™ GEPHY_1x1
• TEST_1X2 Controller for HAPS™ test daughter board TEST_1x2
• BIO1 Controller for HAPS™ test daughter board BIO1
• HAPSTRAK HapsTrak controller for HAPS™ boards

Documentation

• Synplicity's HAPS Development Platform IP Core User's Manual
• Synplicity's HAPS Development Platform Brochure

Downloads

Demonstration designs including a LEON3 SPARC V8 processor have been developed for the HAPS motherboards and are available for download. 

Note that only the GRLIB HAPS distribution with programming files for the LEON3 template designs is required for the demonstration of the LEON3 processor on the HAPS motherboards. 

• Downloads -> LEON/GRLIB -> grlib-haps-1.0.18.tar.gz (or later)  

For those wanting to modify the HAPS demonstration designs, the complete GRLIB IP core library can be downloaded in source:

• Downloads -> LEON/GRLIB -> grlib-gpl-1.0.18-*.tar.gz (or later)

An evaluation version of the GRMON debug monitor is available for download: 

• Downloads -> GRMON -> grmon-eval-1.1.28.tar.gz (or later)

For those wanting to modify or develop software, a LEON cross-compiler is available for download: 

• Downloads -> Compilers -> BCC binaries for Linux & Windows -> windows -> sparc-elf-3.4.4-1.0.30-mingw.zip (or later)
  

Implementation characteristics

The HAPS IP cores are portable and can be implemented on most FPGA and ASIC technologies, and have been tested for Xilinx Virtex-4 and Virtex-5 FPGA technologies. The cores are available in VHDL source code and, when applicable, use the plug&play configuration method described in the GRLIB IP LIbrary User’s Manual.